Utilizing GaN transistors in 48V communications DC-DC converter design: Page 4 of 5

December 06, 2016 //By Di Chen and Jason Xu, GaN Systems
Utilizing GaN transistors in 48V communications DC-DC converter design
As the world’s demand for data increases seemingly out of control, a real problem occurs in the data communications systems that have to handle this traffic.
is when the gate drive is 6.0V and the dead time is 15 nsec or less. By adjusting the gate drive down to 5V, from 6V, the circuit dissipates 0.26W more, resulting in a slight 0.1% loss in efficiency. On the other hand, there is a more significant effect on the dead time, increasing power loss by 0.78W or reducing efficiency by 0.3%. These numbers may seem quite small, but when striving for the highest overall efficiency, working with this GaN technology, and understanding how to optimize its operation is very important.



Table 2. Effects of Gate Drive and Dead Time on efficiency, 240W



For this design, the LM5113 GaN driver from Texas Instruments was used, even though it only supports a gate voltage of 5.0V. One feature of the LM5113 is the separate output pins HOH and HOL, allowing for a higher gate resistor in the ON direction and a lower gate resistor in the OFF direction. Because the threshold voltage of these GaN transistors is approximately 1.5V, having two different resistors helps control both the turn on and turn off waveforms perfectly. Also, using a lower turn off resistor helps to manage the Miller Effect, ensuring that the lower transistor is not falsely turned on during the turn off transition periods. Another feature of this driver is the relatively short delay time of approximately 25-45 nsec, and its well-matched delay time of 8 nsec from the LOW side turning on, to the HIGH side turning off.


Very soon, products with both higher gate drive (6.0V) and lower delay times (15 nsec) will be released. Once such product soon to be released from UPI Semiconductor is the uP1964. It will allow the gate drive to be optimized to 6V, has 13.5 nsec delay times, 5 nsec rise times, and will therefore provide even higher efficiency in the future. GaN transistors emerged into the marketplace

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