The design, shown at the Embedded World Conference in Nuremberg today, achieves a low total thermal resistance of 0,34K/W to 0.28K/W at less than 2 W pump power.
The smaller size of integrated chips and their packaging is a major trend in the electronics industry. However, with the resulting ever-increasing power density come detrimental heat effects that impact the reliability and performances of the devices. Liquid is more effective in removing that heat compared to air, because of its higher thermal conductivity and specific heat capacity. Silicon as a material is also a relatively good heat conductor.
Using silicon for the microchannels produces smaller, more reliable channels at a lower cost than other substrates. This provides high-aspect-ratio microchannel structures of 32µm wide and more than 260µm deep that increase the convective heat transfer surface area and the heat transfer coefficient, enabling high heat flux removal. This makes it possible to dissipate power of more than 600W/cm 2 while keeping the component temperature below 100°C.
“Imec’s microfluidic heat sink realized on a Si platform is a best-in-class technology demonstrating the lowest thermal resistance allowing a power dissipation of over 600W/cm2 in a very small form factor. It allows for an increase in heat flux by two orders of magnitude compared to classical metal heat sinks,” said Philippe Soussan Principal Member of the technical staff.
The microchannel heat sinks are currently built separately using standard indistry processes and then interfaced to the back side of a heat-dissipating chip. Using an optimized Cu/Sn-Au interface, imec achieves a very low thermal contact resistance between both parts.
The next stage is to integrate the cooling and the chips at the wafer level, adding just one dollar to the package cost. As the fluidic performance and thermal behaviour can be predicted with high degree of accuracy, imec’s microcooler can also be tailored according to external system constraints such as space and liquid supply.
“Imec is working towards developing a next generation of this chip cooling solution, directly integrating the heat sinks and the IC at wafer scale, aiming at an additional cost of one USD,” said Soussan.