With a low power peripheral circuit for energy harvesting designs, the embedded 2T-MONOS (2 Transistors-Metal Oxide Nitride Oxide Silicon) flash memory is available with 1.5 MB capacity.
The addition of the circuit technology allows Renesas to achieve a read energy as low as 0.22 picojoules per bit (pJ/bit) at an operating frequency of 64 MHz – among the world’s lowest levels for embedded flash memory on an MCU. The newly developed low-power technology for peripheral circuits comprises circuit technology that reduces energy consumption when sensing data in memory and reduces the amount of transmission energy consumed when read data is transmitted to an external destination.
Together, these advances substantially reduce energy consumption when reading data from the memory. The new SOTB-based technology has already been implemented in the Renesas R7F0E embedded controller intended specifically for energy harvesting applications.
Renesas’ SOTB process technology dramatically reduces power consumption in both the active and standby states. Power consumption in these two states had previously been a tradeoff: Lower power consumption in one generally meant higher power consumption in the other.
The new technology substantially reduces power consumption when reading data from the flash memory. In contrast to non-SOTB 2T-MONOS flash memory, which requires a memory read current of about 50 µA/MHz, the read current is reduced to a mere approximately 6 µA/MHz.
The 2T-MONOS embedded flash memory using the SOTB process has a two-transistor structure comprising electrically isolated elements. Unlike a single-transistor structure, there is no need for negative voltage during read operation, and this reduces power consumption when reading data.
In addition, compared with other memory processes, MONOS uses fewer masks during the production process, and it is possible to store data with a discrete charge-trapping scheme. This enables low power consumption and high rewrite reliability without increasing the production cost.