IEEE 2416 complements the IEEE 1801-2018 Standard for the Design and Verification of Low-Power, Energy-Aware Electronic Systems. It provides a rich set of power modeling semantics enabling system designers to model entire systems with great flexibility. It also supports power modeling from abstract design description all the way to gate level implementation providing data consistency from earliest architectural explorations to final power verification.
“We view IEEE 2416 as a major step forward for low power design,” said Dr. Nagu Dhanwada of IBM, chair of the IEEE2416 and the Si2 UPM Working Groups.
“Energy-aware, system-level design can be a challenging task,” said John Biggs, chair of the IEEE P1801 Working Group, and distinguished engineer and co-founder of Arm. “With this new standard, designers will be better enabled by having access to semiconductor IP delivered with both IEEE 1801 power state models and IEEE 2416 power data models.”
The standard is based around the Unified Power Model (UPM) developed by the Silicon Integration Initiative (Si2) along with major contributions from IBM and GLOBALFOUNDRIES (GF). The UPM is a result of the Si2 OpenStandards Coalition, an R&D incubator which rapidly seeds and prototypes potential new EDA software tool interoperability standards.
“The foundation of the EEE 2416-2019 standard originated in IBM and has been successfully used in power sign-off of several generations and families of IBM microprocessors,” said Dhanwada. “Concepts like multi-level, state based modeling and efficient, expressive semantics in IEEE 2416-2019 support constructing accurate and standardized power models for IP blocks. This enables SoC designs to be energy efficient from the ground up, a key reason companies will use 2416-2019 to upgrade modeling, analysis and sign-off flows,” he said.