How silicon carbide helps to get the best from a solar PV system: Page 3 of 3

August 01, 2018 //By Jonathan Dodge
How silicon carbide helps to get the best from a solar PV system
When working with the design of solar inverters, meeting a certain efficiency specification was mandatory to be competitive in the market.  This is a challenge, especially with 1200 V IGBTs, and required attention to every detail, from bus bar thickness to inductor core material. 

Impact of SiC on Topology Selection

Silicon Carbide (SiC) switches are an obvious choice to replace the IGBTs in new designs.  They have lower switching and static losses and certainly work well at much higher frequencies, reducing passive components size.  A simple solution would be SiC cascode devices in a two-level inverter (Figure 2).  These hybrids of SiC JFETs and traditional Si MOSFETs have flexible gate drive and a fast intrinsic diode with low forward drop.  Switching frequency can be pushed up to 50 kHz or more such that the volt-seconds in the magnetics are low and the clamp transistor can be omitted, leaving the circuit as a standard full bridge.  

The switching loss in the full bridge doubles, but clamp transistor losses are eliminated, creating a dependency between total power losses and switching frequency.  The crossover in switching frequency of TNPC versus two-level topologies is relatively high however for SiC devices, near 100 kHz, with the TNPC topology’s efficiency being much less sensitive to switching frequency.  Compared with the IGBT solution, this is six less switches and 13 diodes.  Magnetics can be specified to give an optimum power and cost saving across resistive and core losses, traded against size.

Figure 2. SiC cascode solution

The problem regarding transformer-less inverter solar systems with ungrounded panels ( which are very common) is that the two-level topology sends high frequency, high voltage common-mode noise along the DC link and consequently all over the solar panel array.  Solutions to this problem include adding a fourth inverter leg, which adds hardware without improving efficiency, adding a line-frequency isolation transformer, which adds unacceptable weight and cost, using an isolated boost converter, or going back with a three-level inverter.  The lowest cost solution comes back to the common topology of Figure 1, with the IGBTs and anti-parallel diodes replaced by cascodes, with the TNPC inverter commutated in a way that cancels the common-mode voltage swings.

Tradeoff

The three-level inverter topology cuts switching loss in half (because half the voltage is switched), which benefits SiC devices less than lossy IGBTs, but is still a benefit. The main advantage with SiC devices is the ability to squash common-mode noise.  The lower losses from SiC purchase greatly reduced size and weight, with equal or reduced system-level cost.  This “expenditure” is very slight because at IGBT switching frequencies, the switching loss of SiC devices is a very small portion of total semiconductor losses.  The switching frequency can often be doubled without significantly affecting overall efficiency.  The impact on passive components and heat sinking is substantial however, greatly shrinking overall size, weight, and installation cost.

Jonathan Dodge is Senior Applications Engineer at UnitedSiC


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