The researchers point out that 180nm CMOS does not provide a good balance of efficiency and high power density simultaneously due to the large parasitic capacitance of the switches and the low Q-factor of the transformers built with aluminium. Despite this, the technique enabled a high power density of 1W/mm 2 .
The technique also scales to more advanced technology nodes with a smaller gate capacitance, positively impacting both the efficiency and power density.
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