The OptiMOS 6 family uses Infineon´s thin wafer technology to get significant performance benefits and will cover a wide voltage range. The devices are being launched at the APEC conference in the US this week.
Compared to the previous generation, the new OptiMOS 6 40 V reduces the on resistance by 30 percent, to boost the performance of SMPS designs over a wide range of output power, avoiding the trade-off between low and high load conditions.
OptiMOS 6 outperforms previous generation products at low output power levels due to its improved switching performance. This can be maintained at even higher output levels despite the dominance of R DS(on) losses. As a result, developers profit from easier thermal designs and less paralleling efforts leading to lower system cost.
The OptiMOS 6 power MOSFET 40 V family is available in two different packages: a SuperSO8, 5 mm x 6 mm with RDS(on) ranging from 5.9 mΩ to 0.7 mΩ; and a PQFN 3x3, 3.3 mm x 3.3 m with the RDS(on) ranging from 6.3 mΩ down to 1.8 mΩ.