Finnish equipment maker Picosun has shown 3D deep trench microcapacitors built in silicon with its ALD technology working with researchers in Italy.
The efficiency and performance demands of portable and wearable electronicscreate new challenges to the power management as the feature size reduces. The need to include energy storage such as batteries or capacitors packed close together calls for new device designs such as 3D deep trench microcapacitors with a high aspect ratio and large surface area where ultra-thin, alternating layers of conducting and insulating materials form the energy storing structure.
Picosun's ALD technology has been used to deposit film stacks of conductive TiN and insulating dielectric Al 2O3 and HfAlO 3 layers into high aspect ratio (up to 100) trenches etched into silicon. THis achieved an areal capacitance of 1 µF/mm 2, which is the new record for this capacitor type, delivering 566 W/cm 2 and 1.7 µWh/cm 2 . The microcapacitors also showed voltage and temperature stability, up to 16 V and 100 ºC, over 100 hours continuous operation.
"We exploited the room available on the bottom of silicon wafers, of which only a few micrometers of silicon are used for electronic components in integrated circuits, to fabricate silicon-integrated 3D microcapacitors with unprecedented areal capacitance," said Prof. Giuseppe Barillaro, group leader at the Information Engineering Department of the University of Pisa, Italy. "The electrochemical micromachining technology, developed at the University of Pisa over the past decade, enabled etching of high density trenches with aspect ratios up to 100 in silicon, a value otherwise not achievable with deep reactive ion etching. This posed the basis for increasing the areal capacitance of our 3D microcapacitors upon conformal coating with an ALD metal-insulator-metal stack,"