Step by step for an optimised flyback design

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By eeNews Europe

Flyback is the most known topology for isolated power supply since it can provide multiple isolated outputs with a single low side switching transistor and limited number of external components. However, a flyback power supply presents some peculiarities that could limit its overall performances if they are not fully understood and analyzed by the designer. 

This series of articles dedicated to this topology demystifies any flyback power supply design with a simple mathematic approach, guiding the designer to a well-optimized design.

The Flyback Converter

DC-DC applications, both multiple outputs and output isolation may need to be implemented depending on the application. In addition, input to output isolation may be required to meet safety standards or provide impedance matching.

Isolated power supplies not only protect users from potentially lethal voltages and currents, but they also provide performance benefits. Isolated supplies preserve instrument accuracy by interrupting ground loops, and they easily provide positive regulated voltages from a negative power bus without compromising the benefits of that bus.  

Flyback topology has traditionally been the designer’s choice for power isolated converters with output power below 100 W. It requires only one magnetic component and one output rectifier, so it has the advantages of simplicity and low cost. Multiple outputs are easily implemented. 

Disadvantages of the flyback topology are the need of a high-value output capacitor, the high current stress in the power switch and in the output diode, high eddy current loss in the air-gap area, a large transformer core, and potential EMI problems. 

Flyback converter derives from the buck-boost topology and it shares the main disadvantages: the energy is only collected from the source during the ON time of the switching MOSFET. And then later during the off time, this energy from the primary winding is delivered from the inductor to the output. This is a unique peculiarity of the flyback and buck-boost topology. (Figure 1) 

Flyback transformer does not work as a traditional transformer where primary current and secondary current flow at the same time, and only a small position of the energy is actually stored in the transformer (magnetizing energy). 

A flyback-transformer is more like multiple inductors on the same core rather than a typical transformer. Ideally a transformer doesn’t store energy, all the energy is transferred instantaneously from the primary to the secondary.

Typical flyback power supply operating in continuous conduction mode

A flyback-transformer is used as an energy storage device; this energy is stored in the air-gap of the core, or in the distributed air gap of the Permalloy power core.

The inductor- transformer should be designed to minimise the leakage inductance, AC winding losses, and core losses. 

The leakage inductance is the part of the primary inductance that is not mutually coupled with the secondary inductance. It is important to keep the leakage inductance as low as possible because it reduces the efficiency of the transformer and it causes spikes on the drain of the switching device. The leakage inductance can be seen as part of the energy stored in the transformer that will not be transferred on the secondary and to the load. This energy need to be dissipated in the primary side through an external snubber. 

The snubber configuration will be discussed later. 

When the MOSFET is switched ON, and a voltage is applied on the primary winding, the primary current rises linearly. The change of input current is determined by the input voltage, the transformer primary inductance, and the on time. During this time, the energy is stored in the core of the transformer, the output diode D1 is reverse biased and energy is not transferred to the output load.  

When the MOSFET is turned off, the magnetic field starts to decrease, which reverses the polarity across the primary and secondary windings. D1 is forward bias and the energy is transferred to the load. 

Discontinous conduction mode versus continuous conduction mode

A flyback converter, just like any other topology has two different modes of operation, discontinuous mode and continuous mode.

A circuit that has been designed for discontinuous mode will move into continuous mode when the output current is increased beyond a certain value. 

In the discontinuous mode, all the energy stored in the primary during the on time is completely delivered to the secondary and to the load before the next cycle, and there is also a dead time between the instant the secondary current reaches zero and the start of the next cycle. 

In the continuous mode there is still some energy left in the secondary at the beginning of the next cycle. The flyback can operate in both modes, but it has different characteristics. 

The discontinuous mode has higher peak currents, and therefore it has higher output voltage spikes during the turn-off. On the other hand, it has faster load transient response, lower primary inductance, and therefore the transformer can be smaller in size. The reverse recovery time of the diode is not critical because the forward current is zero before the reverse voltage is applied. Conducted EMI noise is reduced in discontinuous mode because transistor turn-on occurs with zero collector current. 

The continuous mode has lower peak currents and, therefore, lower output voltage spikes. Unfortunately it makes the control loop more complicated because of its right half plane (RHP) zero that forces to reduce the overall bandwidth of the converter. 

The  continuous conduction mode will be analysed in more detail since it is the preferable choice for most applications.         

Defining the flyback transformer: Windings Turns Ratio and its inductance

The first difficulty that a designer has to deal with is the definition of the flyback transformer. Most of the time it can be selected from a standard catalogue of flyback power transformers without any need of a more costly custom made one. Many supplies offers complete families of transformers for different applications and power sizes, however it’s important to understand how to pick the most appropriate one. 

Beside power size and number of secondary windings, the transformer can be classified by its primary/secondary winding turn ratio, and primary or secondary inductance

If it’s ignored the effect of the drop voltage across the switching MOSFET and output rectification diode, the volt*second during the on time (Ton) should be equal to the volt*second during the off time (Toff), in steady state operation:


  • VIN is the input voltage
  • VOUT is the output voltage
  • Nps the turn ratio between primary turns/ secondary turns of the flyback transformer

Then the direct relationship between turn ratio at maximum duty cycle and minimum input output voltage is:

D is the duty cycle: TonI switching period.

In many cases the maximum duty cycle is selected arbitrarily at 50%, however in applications with a wide input voltage range it is important to understand how to optimise this relation: maximum duty cycle, transformer turn ratio, peak current and voltage rating.   

One of the main advantages of the flyback topology is the possibility to operate at a duty cycle greater than 50%. The increase of maximum duty cycle reduces the peak current on the primary of the transformer, resulting in better copper transformer utilisation on the primary and lower ripple on the input source. At the same time the increase of the maximum duty cycle increases the maximum stress voltage between drain to source of the main switching MOSFET, and increases the peak current on the secondary side.  

Before starting the design of the converter it’s important to understand the relation between maximum duty cycle, primary/secondary transformer turn ratio (Np/Ns), maximum voltage stress on the primary MOSFET, maximum primary and secondary current.  

Equation (2) shows the main relation between output voltage Vo and input voltage Vi (for its simplicity is not considered the drop voltage across Q1 and the secondary rectified Q2). In order to insure Vo regulation at full input voltage range the maximum Duty cycle Dmax could be arbitrarily selected to a theoretical value < 1.

Then the Np/Ns can be calculated:

The Dmax thus selected implies a maximum voltage between drain to source of the main MOSFET, VdsQloff given by equation (4) and equation (5) and (6) give respectively the average current on the primary and on the secondary of the transformer.


  • Vdfw is the drop forward voltage of the secondary rectifier diode
  • Vdon is the drop voltage of the switching MOSFET during conduction
  • n is the efficiency of the overall power supply
  • Iomax is the maximum output current

The optimum duty cycle can be obtained by maximizing the utilisation factor U(D) function of the duty cycle:

The utilization factor (Ui) is the output power divided by the sum of the total maximum stress of the switching MOSFETs and rectifier diodes on the secondary side.  

The graph on Figure 2 shows the utilization factor calculated only considering only the stress of the switching MOSFET (blue dot line), and the utilization factor considering the switching MOSFET and the rectifier diodes on the secondary side (red dash line).   

To optimize the power supply efficiency at nominal input voltage the primary/secondary transformer turn ratio should be calculated with a duty cycle that maximises the utilisation factor which typically is a value between 30-40%.

Figure 2:
Utilization factor versus duty cycle for a typical flyback converter,
the utilization factor is maximised with a duty cycle of 30-40% 

The graph above takes into consideration only the theoretical stress voltage on the active components. In practice, it is more important to evaluate how Maximum MOSFET stress voltage and transformer turn ratio varies with it’s maximum selected duty cycle, and select a value that gives a "round" turn ratio value within a certain maximum break-down voltage of the switching MOSFET.    

Define Primary Inductance 

There are several criteria for selecting the primary and secondary inductances.  

The first one is to select the primary inductance in order to insure continuous mode of operation from full load to some minimum load. The second consideration is to calculate primary and secondary inductances by defining maximum secondary ripple current. And the third one is to calculate the primary inductance in order to keep the right half plane zero (RHP) as high as possible in order to maximise the maximum cross over frequency of the close loop.  

In practice, the first criterion is used only in particular cases, and the magnetizing inductance is selected as a good compromise between transformer size, peak currents, and RHP zero.      

To calculate primary and secondary inductances by defining maximum secondary ripple current, the secondary inductance (Ls) and primary inductance (Lp)can be calculated as following:

Where  fsw is the switching frequency, ΔIs is the allowed secondary ripple current, which is usually set about 30-50% of the rms output current:

Then the equivalent primary inductance is obtained by:

As mentioned before, the primary inductance and the duty cycle will influence the right half plane zero (RHP). The RHP adds a phase lag of the close loop control characteristic forcing the maximum cross over frequency to be at most 1/4 RHP frequency.  

RHP is a function of the duty cycle, load, and inductance, and causes and increase in loop gain while reducing the loop phase margin. A common practice is to determine the worst case RHPZ frequency and set the loop unity gain frequency below one-third of the RHPZ.   

In the Flyback topology, the equation for the RHPZ is:

The primary inductance can be selected to attenuate this undesirable effect.   

The graph in Figure 3 shows the effects of the primary inductance on primary and secondary currents, and RHP zero: with an increase in inductance the ripple currents are reduced, therefore input/output ripple voltage and capacitor size could be potentially reduced as well. But increasing the inductance increases the number of primary secondary windings of the transformer and it reduces the RHP zero.  

Common sense suggests to not oversize the inductance to avoid compromising the overall close loop performance of the entire system and the size and losses of the flyback-transformer.  

The graph and equations above are valid only when the flyback operates in continuous conduction mode.

Figure 3:
Primary, secondary ripple current,
RHP zero versus primary inductance of a typical flyback design

Select the power switching MOSFET and calculate its losses

The MOSFET is chosen based on maximum stress voltage maximum peak input current , total power losses, maximum allowed operating temperature, and current driver capability of the driver.

The drain to source breakdown of the MOSFET (Vds) has to be greater than:

Continuous drain current of the MOSFET (Id) has to be greater than primary peak current ( Ippeak equation 15)

Besides maximum voltage rating, and maximum current rating, the others three important parameters of a MOSFET are Rds(on), gate threshold voltage, and gate capacitance.  

The switching MOSFET has three types of losses, conduction loss, switching loss, and gate charge loss:

  • Conduction loss is equal to:  I2.R loss, therefore the total resistance between the source and drain during the on state, Rdson has to be as low as possible.
  • Switching loss is equal to: Switching-time*Vds*I*frequency. The switching time, rise time, and fall time is a function of the gate to drain Miller-charge of the MOSFET, Qgd, the internal resistance of the driver and the Threshold Voltage, Vgs(th) the minimum gate voltage which enables the current through drain source of the MOSFET.
  • Gate charge loss is caused by charging up the gate capacitance and then dumping the charge to ground every cycle. The gate charge loss is equal to:  frequency * Qg(tot) * Vdr

Unfortunately, the lowest on resistance devices tend to have higher gate capacitance.  

Switching loss is also affected by gate capacitance.  If the gate driver has to charge a larger capacitance, then the time the MOSFET spends in the linear region increases and the loss increases.  The faster the rise time, the lower is the switching loss.  Unfortunately, this causes high frequency noise.

Conduction loss is not frequency dependent; it does depend on the Rdson and the  square of the primary RMS current IpRMS:

The primary current of a flyback operating in continuous conduction mode looks like the trapezoidal waveform shown on top of Figure 4.

Figure 4:
Current and voltage waveform across the MOSFET during the commutation 

Ib is equivalent to the peak primary current:

Ia is the average current, previously obtained from equation 5, minus half the ΔIp current:

Then the switch’s RMS current is obtained from:

Or it’s quick approximation:

Switching loss (Psw) depends on voltage and current during the transition, switching frequency and switching time, Figure 4.

During turn on, the voltage across the MOSFET is the input voltage plus the output voltage reflected on the primary, and current is equal the average central top current minus half the ΔIp:

During turn off, the voltage across the MOSFET is the input voltage plus the output voltage reflected on the primary winding plus the zener clamping voltage used to clamp and absorb the leakage inductance. The switch off current is the peak primary current.

Switching times depends on maximum gate driver current, and total gate charge of the MOSFET.    

MOSFET parasitic capacitances are the most important parameters conditioning MOSFET switching times. The capacitances Cgs and Cgd depend on the geometry of the device and inversely on drain to source voltage.  

Usually these capacitance values are not directly provided by the MOSFET manufacture but can be obtained from the values of Ciss, Coss and Crss.   

Turn on switching time can be estimated with the gate charge using the following equations:


  • Qgd is gate drain charge
  • Qgs is gate source charge
  • Rdron is the on time driver resistance when the driver voltage is pulled up to the driver voltage
  • Rdoff is the internal driver resistance when the driver voltage is pulled down to ground
  • Vgsth is gate-source threshold voltage (gate voltage where the MOSFET starts to conduct)


The leakage inductance can be visualised as a parasitic inductance in series with the primary side inductance of the transformer, and its part of the primary inductance that is not mutually coupled with the secondary inductance. When the switching MOSFET is turned off, the energy store on the primary inductance moves to the secondary and to the load through the forward bias diode. The energy stored on the leakage inductance does not have a place to go, and it turned into huge voltage spikes on the switching pin ( drain of the MOSFET).The leakage inductance can be measured by shorting the secondary windings and measuring the inductance on the primary, and it’s usually given by the transformer manufacture.  

A common way to dissipate the leakage energy is through a zener diode connected in parallel with the primary winding via a blocking diode in series with it, shown on Figure 5.

Figure 5:  Zener clamping circuit    

The leakage energy that has to be dissipated through an external clamping snubber is

The zener voltage should be lower than the maximum drain to source voltage of the switching MOSFET minus maximum input voltage, but high enough to be able to dissipate this energy in a short period of time.   

The maximum power loss associated with the zener diode is:

Flyback design resources

To support flyback designs National semiconductor has developed a series of PWM regulators and controllers particularly suitable for flyback applications. On National Semiconductor’s website ( can be found a typical flyback reference designs, application notes, MathCAD spreadsheets and on-line simulation tools to guide the designer to a well optimised flyback power supply design.  

Figure 6 shows a typical 5 W flyback power supply with LM5000 regulator simulated with Webench with an input voltage that varies from 10 to 35 V and an output voltage equal to 5 V at 1 amp. The design follows the procedures described above: a Coilcraft  transformer with primary to secondary turn ratio equal to 3 and primary inductance of 80 uH ensures a well regulated output voltage minimizing the peak primary current below 1.3 amps, and the maximum voltage cross the internal switching MOSFET below 60 V.     

A primary inductance of 80 μF ensures a peak to peak secondary ripple current within 30% of the average current, while maintaining the right half plane zero above 20 kHz.

Figure 6:
Typical 5 W flyback design with Webench online simulation tool 

Webench is the National Semiconductor online design tool that allows the design of a complete switching power supply in four simple steps. Figures 7 and 8 show the bode plots and switching waveforms obtained with Webench design.

Figures 7-8
Bode plots and switching waveforms of the output voltage
and switching pin 

The next article in this two-part series will describe in detail the close loop design of a flyback converter operating in continuous conduction mode, and how to close the loop with isolated outputs.

This article is the first part of a two-part series. To read part 2 of the series click here.

About the author

Michele Sclocchi is technical marketing for power management products. Sclocchi is based at Texas Instrument Sales office in Milan , Italy .

Sclocchi joined National Semiconductor in 2000. He is a specialist in switching power supply, responsible for the new products definition in the renewable energy area.

Michele Sclocchi holds a Master Degree in Electrical Engineering from the Politechnic University of Milan/Italy. He has authored over 95 publications in power electronics.


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