Special Interest Group for AI and machine learning in chip design tools
The Si2 group will be chaired by researchers from IBM and Samsung and aims to identify current solutions and technology gaps in AI and ML strategies for EDA digital design.
“AI and ML are changing semiconductor design and improving performance and time to market,” said Leigh Anne Clevenger, Si2 design automation data scientist. “Based on member company interest, we expect the SIG to propose prototype projects to accelerate the development of standards in areas such as machine learning training, and data handling and sharing.
“High manufacturing costs and the growing complexity of chip development are spurring disruptive technologies such as AI and ML,” she said. “Si2 provides a unique opportunity for semiconductor companies, EDA suppliers and IP providers to voice their needs and focus resources on common solutions, including leveraging university research.”
The SIG is open to all Si2 members and is chaired by Joydip Das, Senior Engineer I, Samsung Austin R&D Centre, and co-chaired by Kerim Kalafala, senior technical staff member, EDA, IBM.
“In recent years, the EDA industry has significantly expanded the use AI/ML technology and techniques in its design tools,” said Das. “We’ve identified the need for a common industry-wide infrastructure to help share this information. This will help eliminate duplicative work and open up avenues for new breakthroughs.”
Other Si2 members in the SIG include Advanced Micro Devices, ANSYS, Cadence Design Systems, Hewlett Packard Enterprise, Intel, Intento Design, NC State University, PDF Solutions, Sandia Labs, Synopsys and the University of California, Berkeley.
PDF Solutions for example is working with UK tool and IP developer UltraSoC on AI techniques that monitor the performance of chips in the field to identify potential failures.
Si2 was founded in 1988 to develop standard interoperability solutions for integrated circuit design tools. Its activities include support of OpenAccess, the world’s most widely used standard API and reference database for integrated circuit design.
Next: Other Si2 tool developments
Last month Si2 saw its Unified Power Model approved as IEEE 2416-2019, a new Standard for Power Modeling for system level analysis. A prototype power tool, upmPowerCalc, was built to prove the new concepts from end-to-end in the chip design process.