NeoFuse is a small-form factor non-volatile anti-fuse logic technology with low power operation, high reliability and strong security. It provides non-volatile storage functions from 150nm down to the leading 5nm FinFET technology node with a memory density from 64 to 4M bits. Being able to programme secure code in high voltage chips is a key capability for OLED display driver chip designers for functions such trimming and parameter setting.
For IP operations, NeoFuse provides a user-friendly interface and fully integrated OTP IP that minimizes design effort and circuit complexity when embedded as a non-volatile silicon IP. An internal charge pump is embedded in the NeoFuse silicon IP to enable field programming capabilities and eMemory’s proprietary ROM code conversion, NeoROM, can also be used to reduce programming costs once the program code is fixed.
Key customers have completed successful product tape outs using the IP and process, which are ready for mass production.
“In addition to previous implementations on UMC’s HV process platforms, we’re pleased to work with UMC again to extend NeoFuse IP to the 28nm HV process to meet various demands for OLED application to create value for customers,” said Michael Ho, Vice President of Business Development at eMemory.
eMemory logic NVM solutions have been implemented in a wide range of UMC’s HV process nodes for OLED applications. “eMemory’s NeoFuse IP is a welcome resource for our foundry customers wishing to customize their ICs on our 28nm HV process to serve OLED markets,” said T.H. Lin director of IP Development and Design Support division at UMC. “Our two companies have shared positive results through our IP collaboration for UMC’s 55nm, 40nm, and 28nm HV technology platforms, which are optimized to satisfy the performance requirements of display driver applications including OLED.”
As OLED displays have taken a dominant position in high-end smartphones, small display driver ICs (SDDIs) have become performance driven. Compared with 55nm or 40nm HV, the 28nm HV process can provide faster data rates for OLED DDIs, higher SRAM density and better power consumption, all of which result in superior image quality with ideal power efficiency. The more advanced node also allows the use of increasingly complex algorithms for powerful display engines.
UMC’s 28nm HV process features the industry’s smallest SRAM bit cells to reduce chip height and area, while its 28nm Gate-Last HKMG scheme features low leakage and high dynamic power performance to enhance battery life for mobile devices.
eMemory’s IP technologies include NeoBit, NeoFuse, NeoMTP, NeoEE and NeoPUF. Products developed with these core technologies have been made into more than 41 billion chips used in various consumer, industrial and automotive applications.