DC/DC power-supply choices: new choices in cost, size, performance

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By eeNews Europe

Any power-supply design involves striking a balance among factors of size, cost, and performance. The first step in any new project is putting these three parameters in order of priority as an overall guide to the design process, including the cost of design, which includes both the Cost of Goods Sold (COGS) and the cost of the design effort. An experienced designer is more efficient due to their familiarity with the design process, topologies, components and potential pitfalls, and is also able to judge when and where additional design effort or customization is a worthwhile expenditure.

An engineer should follow a good top-down design methodology, beginning with an accurate requirements analysis and power budget, leading into a supply topology. This is followed by the detailed design of each regulator and the specification of component placement and routing constraints for the Printed Circuit Board (PCB). Too often, designers dive into a design prematurely, with incomplete information, and invest large amounts of time building a power supply that is oversize, over cost, or inadequate for the application.

Requirements analysis

At the start, each power rail (voltage) required by the system must be identified, along with worst-case and nominal-case figures for current draw – both continuous and transient current, based on device specifications and usage conditions. This generally involves examining each active component on the board and compiling a spreadsheet to tabulate the current load on each voltage rail. Additionally, the rails must be specified for the following:

DC voltage level and accuracy (±5% standard, ±1% to ±3% required for some ICs).

    Maximum allowable noise or Periodic and Random Deviation (PARD) (±4% to 5% standard, ±1% or better for “analog” supplies).

    Any sequencing requirements.

Power-supply topology

Once the requirements have been diligently gathered, the next step is to come up with the best topology. Linear and LDO regulators are great for producing low-noise power rails (look for a ripple-rejection ratio of 40dB or better) and are low-cost, but are highly inefficient when there is a large difference between input and output voltage. In some cases it is best to pre-regulate using a switching buck, boost, or buck-boost converter, followed by individual LDOs for each power rail.

Today’s ICs often require numerous digital-supply voltages spread out to single chips on a board. Small LDOs allow the designer to distribute these drop-down regulators on the board and place them at the point of load. This helps eliminate potential voltage drop during current transients that can cause erratic behavior in ICs and allows the use of smaller traces on these often very dense PCBs.

Figure 1 shows an example power supply topology for generating +5V, +3.3V and +1.8V digital rails, plus an analog +3.3V supply from a 9 to 24V input.


Figure 1:  Example Power Supply Topology

In the topology shown, an extra 0.17W is wasted as heat in order to create a clean 3.3V supply from the +5V rail. However, this protects it from any noise generated by digital devices on the main 3.3V supply. Alternatively, using a passive LC filter to derive a 3.3V analog supply from the 3.3V digital supply would raise efficiency, but also raise the risk of noise conduction to sensitive analog circuitry.

Detailed design

To optimize power usage and minimize heat dissipation, switching regulators are a must for all but the most noise-sensitive applications. Fortunately, a large variety of them are available that are relatively small, low-cost, and high performance.

Small switching-regulator ICs with integrated FETs running at 1MHz or more are particularly useful for low-power devices when combined with ceramic capacitors, miniature magnetics, and ferrite beads. Regulator ICs are also available in multi-output versions, saving on quiescent current draw and board space. Higher switching frequencies mean that smaller, cheaper magnetics can be used, and output filtering can be achieved with small capacitors and ferrite beads.

In some cases, large-value (>1μF) ceramic capacitors cannot be used on the output of switching power supplies because they will make the converter unstable due to their extremely low Equivalent Series Resistance (ESR), or because a higher capacitance is required. In this case, aluminum electrolytic, polymer, or tantalum capacitors are a common choice.

The latter two have much better performance in terms of their small size, high ripple current, and low ESR, but are more expensive. Tantalum capacitors should be over-specified by at least 2× to 3× in terms of voltage and preferably be surge-rated, since they are much more sensitive to over-voltage than ceramic or aluminum electrolytic types.

Component placement and routing

Once the power budget, topology and detailed design are complete, attention must be paid to component placement and routing of the PCB. Every project has its own parameters take into account. The general idea is this:

    Locate switching power supplies as far away from other components as possible, especially from sensitive analog circuits.

    Switching FETs, freewheel diodes, input and output capacitors, inductors and any other components in the high-current or switching path should be placed close together and routed minimum length by hand.

    Often, a top-side copper pour or partial plane is used for nets connecting the above components. Multiple large power vias should connect the lands of these devices to the planes.

    Resistors and capacitors in the compensation network should be placed close together and away from switching elements.

    Analog feedback signals should be routed minimum length and on thin traces away from switching elements, preferably shielded by a plane.

By following these guidelines, designers will be better able to develop a robust power supply that is optimized for size, cost and performance.

Modules offer an alternative

There is another option for power supplies that has recently emerged: the DC/DC point-of-load (POL) power module, which combines most or all of the components necessary to deliver a plug-and-play solution. The integration can simplify and speed designs while reducing the power management footprint and, in effect, follow the basic design guidelines that have been presented above.

The newest of these modules is the fully encapsulated, DC/DC POL digital power-module supply, which delivers all the advantages provided by a digital power solution via the PMBus and encapsulated module packaging. Enabled by the internal digital controller, the PMBus can be used to configure a wide variety of parameters to adapt to specific application needs. Various parameters can be monitored and stored in on board nonvolatile memory, and as with most advanced modules now, almost all discrete components are integrated.

Potential advantages include reduction in time-to-market, reduction in the bill of materials (BOM) on the PCB, and increased long-term reliability. Fully encapsulated packaging provides large thermal pads on the bottom of the package for enhanced thermal capability, and exposed leads around the edge of the package for better solder-joint inspectability. With the ability to run off 3.3V, 5V, and 12V bias rails and output a voltage from 0.54 to 4V (with a single resistor setting), and up to 12A of output current, a fully encapsulated digital module is versatile enough to meet a fairly wide range of application requirements.

One of the major advantages of an encapsulated digital-power module is superior power density, which is enabled by improved thermal performance of the package. Power density and thermal resistivity of the package go hand-in-hand, especially when considering a high-power solution, here defined as greater than 25W.

There has been a trend to improve density/integration for decades in the semiconductor industry. The key reason for this is that systems are growing in functionality, which requires more components and are being reduced in size to stay competitive. Therefore, component/solution size is a key part of this trend, which means the customer can fit more content or a higher/larger power processor, for example, on a PCB. One example is the server application or automated test equipment.

The lower the thermal resistivity is, the higher the possible power density–some encapsulated-module solutions struggle to meet higher power levels due to their package’s thermal resistivity. Also, the more thermally efficient the solution is, the less a user needs to be concerned with, or design around, the solution constraints, such as ensuring there is a specific amount of air flow, or adding a heat sink. Optimal thermal performance is enabled by the enhanced encapsulated QFN package with the large pads on the bottom of the package and the thermally enhanced package overmold material that acts as a heat spreader.

Very low thermal resistivity of the package can be demonstrated by a package theta junction-to-ambient (ΘJA) rating of 11.5°C/W and bottom of the package theta junction-to-case (ΘJC) rating of 2.2°C/W. As a result, a higher-power solution can be designed in a smaller form factor. Since the ΘJC on the backside of the package is so low, the majority of the heat is dissipated through the bottom of the package.

In contrast to an open-framed module, no air flow is required to run at full load over the industrial ambient temperature range in most operating conditions. The thermal capability of a module package has a major influence in achieving a higher power density than more traditional open-framed modules or discrete power solutions, and makes the encapsulated module a solid choice to replace either.

All the components are fully encapsulated, so there is excellent electrical isolation, fewer solder joints that can go bad over time, lower chance of stresses in a given application causing package cracks, and improved manufacturability since the encapsulated package is more amenable to traditional pick-and-place equipment compared to a non-planar, open-frame solution.

One example of the newest DC/DC encapsulated power module is the ZL9101MIRZ from Intersil, which offers a combination of next-generation package technology and easy-to-use digital-power management. This class of component will simplify potential sophisticated POL power-supply design due to fewer external components, improve reliability over traditional open-framed modules or discrete solutions, and improve design-cycle time or time to market. It applies a system called PowerNavigator with the PMBus and a GUI to simplify and optimize configuration and monitoring, Figure 2.


Figure 2: Encapsulated power modules and application software offer a strong alternative to open-frame supplies

In some cases, encapsulated modules can have four times greater power density. For example, the Intersil ZL9101MIRZ has a power density of 38W/cm3 versus 8.6W/cm3, which is over three times greater than the equivalent open-framed module, both at an output-power level of 30W. There is also a significant difference in the footprint of the two solutions: 2.2 cm2 versus 3 cm2—a 30 percent difference–which is critical when board space is at a minimum.

Encapsulated digital power-module technology offers a beneficial combination of next-generation package technology and easily implemented digital-power management that will simplify POL power-supply design with minimal external components, improved reliability over traditional open-framed modules or discrete solutions, and enhanced design-cycle time. DC/DC non-isolated power modules offer a complete range of current and voltages in rugged, standard packaging at a reasonable cost. They are now a very strong design option for the next generation of communications systems and industrial products.

(Editor’s note: if you are interested in more insight on the topic of supply topologies, check out our on-demand online course Fundamentals of Power-Supply Distribution Topologies, click here.)

About the Authors

Jay Aggarwal is CEO of Axelsys Engineering ( Prior to Axelsys, he held management roles within engineering and business development at Altera, Xilinx and Silicon Storage Technologies (SST). Jay has a BSEE from California Polytechnic (CalPoly), San Luis Obispo and an MBA from Santa Clara University.

Josh Broline is a Lead Marketing Engineer with Specialty Products group at Intersil Corp. (, responsible for the Power Module product line. He has nine years of service with Intersil, the first five years as a product engineer and the last four as a marketing engineer responsible for various product lines. Josh has a BSEE from University of Central Florida and an MBA from Florida Institute of Technology.


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