When the lower FET turns off and upper FET turns on, the bottom side of the boot capacitor increases to the Vs voltage on the inductor’s input. When this occurs, the top side of the boot capacitor has an approximate voltage of Vs + Vc relative to ground. The upper FET’s gate and the voltage swing on the boot capacitor’s top side both swing from ground at their lowest potential to Vs + Vc when the upper FET is switched on.
Let’s now compare this to the synchronous buck converter that uses a P-channel FET as the upper switch. This arrangement is shown in Figure 5. In this circuit, the gate of the upper FET needs only to switch between ground when the upper FET is on, and Vc when the upper FET is off. There is no need for a boot capacitor and the entire circuit can operate at the Vc supply voltage potential.
Making the Right Choice
The ISL78233, ISL78234 and ISL78235 pin compatible devices use the P-channel configuration. They integrate a low on-resistance P-channel (35mΩ, typical) high-side FET and N-Channel (11mΩ, typical) low-side FET to maximize efficiency. At 100% duty cycle operation, there is less than 250mV drop across the P-Channel FET at 5A output current. Most of the time, the devices will be converting 5 volts down to a voltage as low as 0.6 volts, and the duty ratio will be below 50%. Therefore, even though the P-channel FET has higher resistance than the