6) Transient Response
LDOs are commonly used in applications where point-of-load regulation is important, such as powering digital ICs, DSPs, FPGAs and low-power CPUs. The load in such applications has multiple modes of operation, which require different supply currents. As a result, the LDO has to respond quickly to keep the supply voltage within the required limits. This makes the transient behavior of an LDO one of the critical performance parameters.
As in all closed-loop systems, the transient response mainly depends on the bandwidth of the closed-loop transfer function. To achieve the best transient response, the closed-loop bandwidth has to be as high as possible while ensuring sufficient phase margin to maintain stability.
Figure 5: ISL80510 transient response (2.2Vin, 1.8Vout)
7) Quiescent Current
The quiescent current (or ground current) of an LDO is the combination of the bias current and drive current of the pass element, and is normally kept as low as possible.
Additionally, when PMOS or NMOS FETs are used as the pass element, the quiescent current is relatively unaffected by the load current. Since the quiescent current doesn’t pass through to the output, it influences the LDO’s efficiency, which can be calculated as follows in Equation 5:
The power dissipation inside the LDO is defined by: V in x (I q + I out) - V out x I out .
To optimize the LDO’s efficiency, both quiescent current and the difference between the input and output voltages must be minimized. The difference between the input and output voltages have a direct impact on efficiency and power dissipation, so the lowest dropout voltage is generally preferred.
Even though an LDO cannot deliver high efficiency conversion compared to a switching-mode power supply (SMPS), it is still a necessary voltage regulator for many modern applications. In noise sensitive applications, it is very challenging for an SMPS to achieve the necessary output ripple to meet