Powering Ethernet, Part 1: Designing for low power consumption in operation

June 23, 2015 //By Mike Jones
Powering Ethernet, Part 1: Designing for low power consumption in operation
Mike Jones of Micrel explains how to design for low power consumption in Ethernet operation.

Analyzing power consumption in Ethernet circuitry shows it to be far from efficient. This is in part because Ethernet consumes similar energy during both traffic and idle periods, and in fact, idle periods typically account for more than 97 percent of the time. This was key to determining where improvements could be made to reduce power consumption, when investigated by an IEEE task force; resulting in the standardization of IEEE 802.3az, or Energy Efficient Ethernet.
Energy Efficient Ethernet shows great promise to universally succeed where earlier attempts to reduce idle period power have somewhat failed with methods such as Wake-on- LAN. Complimenting Energy Efficient Ethernet, additional power savings can also be made both during normal traffic and link down. This paper outlines where the current is consumed and how to design for the lowest power consumption, both in operation (Part 1) and standby (Part 2), since calculating the power consumption of an Ethernet circuit is not always straightforward.
The first step towards achieving low power Ethernet designs is understanding where the power is dissipated. In any Ethernet device, the major power dissipation is from the PHY transceiver (Figure 1).

Figure 1: Power dissipation from the PHY transceiver: power is often consumed both internally to the PHY and externally in the transformer

In the case where Ethernet datasheets publish the device only current consumption, calculating the total circuit current consumption requires the designer to add typically around 40mA per 100Base-TX or 70mA per 10Base-T PHY for dissipation in the transformers. As a result, a lower device only consumption at 10Base-T will rarely equate to lower total circuit current consumption, relative to 100Base-TX mode. Micrel’s latest PHY technology employs voltage mode techniques which not only reduces power consumption typically by 50% but dissipates all current within the PHY itself; resulting in the total power consumption = device power consumption (no dissipation externally in transformer).

A designer must consider the

Design category: 

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