Power management can cause latchup in CMOS chips

February 08, 2016 //By Paul Rako
Power management can cause latchup in CMOS chips
Paul Rako of Atmel explains how power management can cause latchup in CMOS chips.

If you leave signals applied to the inputs of a CMOS chip with the power turned off, the chip might explode when you re-apply power. This is called latchup. Similarly, if you drag the outputs of a CMOS chip above or below the power supply rails you can latchup the part. Latchup is not always destructive. Sometimes the part heats up, but when you remove all power and signals, the chip has survived the latchup condition. It does not matter if the CMOS IC is a microcontroller, an operational amplifier, an analog-to-digital converter (ADC), logic, or analog multiplexor.

Latchup becomes a real problem when you try to power up and down different sections of your design to save power. It is also a problem when you have cables or inputs from other devices going directly to your chip. Another common problem is when a CMOS output is connected to a large capacitive load. The part will go into latchup the moment you turn off its power. As long as you don’t turn the power back on for a few moments you are fine, the energy in the capacitor dissipates and the CMOS part is out of latchup. But if someone cycles power quickly, or if there is a momentary dropout or glitch, boom, the part blows its lid.

I got to thinking about latchup when I heard that the Atmel SAM L21 microcontroller has five separate power domains inside the chip. Rather than just kill the clock to unneeded circuit blocks, the SAM L21 turns off power to the block. This is great, since it removes any leakage current contributed by that block. The IC designers can use tiny fast cheap transistors that tend to have higher leakage, but it does not matter. When you turn off the circuit block, with zero volts across the logic gates there can be no leakage.

The IC designers who did the SAM L21

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