Improving peak current-mode control: Page 2 of 5

May 10, 2013 //By Terry Allinder
Improving peak current-mode control
Terry Allinder of Texas Instruments focuses on a novel method to improve the performance of peak current-mode control.

peak current-mode control
When the controller is in pulse-by-pulse current limit the primary switch can't be turned off instantly. There are propagation delays within the PWM and power stage, which include the controller's leading edge blanking (LEB), and propagation delay in the current limit comparator, logic circuits, gate driver, and turning off the power MOSFET. Propagation delays cause the peak primary current to be higher than expected due to overshoot.

Equation 1 calculates the actual peak primary current:


After calculating the peak primary current, we can use Equation 2 to calculate the input power:


Calculate slope
These propagation delays can be several hundred nano seconds long. Using Equation 3 we can calculate the slope of the primary current, where V IN is the rectified dc line voltage, L P is the transformer primary inductance, and dt is the total propagation delay.


With a fixed propagation delay (dt in Equation 3 ), as V IN increases the slope of the primary current also increases. Because the of the propagation delay, the peak current at the maximum V IN will be higher than the peak current at the minimum V IN because of the overshoot ( Figure 2 ).

Click on image to enlarge.
Figure 2. Propagation delay vs. V IN.

The result is that the input and output power increases as the input line voltage increases. An example illustrates the problem. The peak primary current ( Equation 4 ) is based on these systems requirements:

For peak current-mode control, after we calculate the peak current, we can size the current sense resistor ( Equation 5 ).


VCS is the PWM current limit comparator voltage reference (0.5V). The peak current overshoot at the minimum input voltage is:

At the maximum input line the peak current

Design category: 

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