High-capacity, multilayer ceramic capacitors (MLCC) have a property often not well understood by electronic designers: the capacitance of these devices varies with applied DC voltage. This phenomenon is present in all high-dielectric constant, or Class II capacitors (B/X5R R/X7R, and F/Y5V characteristic). However, the amount of variation can differ considerably among different MLCC types. A good article on this topic was written by Mark Fortunato. 
The conclusion of this article is that you should always check the capacitor’s datasheet to see how the capacitance varies with the bias voltage. But what if the datasheet does not include this information? How can you determine how much capacitance is lost under the conditions in your application?
Theory for Characterizing Capacitance versus Bias Voltage
A circuit to measure the DC bias characteristic is shown in Figure 1.
Figure 1. Circuit to characterize capacitance versus bias voltage.
This circuit is built around op amp, U1 (MAX4130). The op amp acts as a comparator, with feedback resistors R2 and R3 adding hysteresis. D1 sets a threshold above GND so that no negative supply voltage is needed. C1 and R1 form a feedback network to the negative input, which makes the circuit operate as an RC oscillator. Capacitor C1, the device under test (DUT), serves as the C in this RC oscillator; potentiometer R1 is the R.
The voltage waveforms of the op amp output pin, V y, and the junction between R and C, V x, are shown in Figure 2. When the output of the op amp is at 5V, capacitor C1 is charged by R1 until it reaches the upper threshold. This forces the output to 0V. Now the capacitor is discharged until Vx reaches the lower threshold, thus forcing the output back to 5V. This process repeats, resulting in a stable oscillation.
Figure 2. Oscillation voltages V X and V Y.