Envelope Tracking Modulator with quad power IC and FPGA control

February 02, 2015 //By Peter Markowski
Envelope Tracking Modulator with quad power IC and FPGA control
Peter Markowski of Envelope Power discusses an Envelope Tracking (ET) modulator design using Vishay’s SiP2204 and FPGA control.

Envelope tracking technology is a well-known method of improving the efficiency of RF amplifiers operating with rapidly varying signal amplitude. The voltage source in an envelope tracking system is modulated to keep the RF amplifier as close as possible to the compression, where the efficiency is at its maximum (see Figure 1).


Figure 1: Envelope tracking principle of operation (left) and reduced bandwidth version (right)

The envelope tracking technique was described by Bell Labs in 1937. The similar techniques of envelope elimination and restoration were described by L. Kahn in 1951. Yet despite its obvious advantages, practical implementations were very rare simply because of the very high requirements imposed on a modulator. It has to combine very high bandwidth (up to 100 MHz in some new systems) with high efficiency, small size, and low cost.

One of the ways to lower the bar is to reduce the bandwidth requirements. This is simple in implementation, but a significant portion of the potential efficiency improvement is lost (see Figure 2).

Figure 2: Envelope tracking with reduced bandwidth

A different approach was proposed by Gunnar Cragfors in 1981 in U.S. patent no. 4,390,846, and later by Peter Garde in U.S. patent no. 4,516,080 (see the drawing from Cragfors' patent in Figure 3). According to these inventors, modulator should consist of two parts: a switching regulator for low bandwidth and linear regulator for high bandwidth.

Figure 3: Linear regulator (F) and switching regulator (SW) combine for high-efficiency, high-bandwidth voltage modulation in Gunnar Cragfors' U.S. patent no. 4,390,846 (S – summing node)

While the RF amplifier can now work with full efficiency, there is a price to be paid in the cost, complexity and reduced efficiency of the modulator itself. This approach was realized in some commercial applications, but the most typical architecture is similar to the one proposed by Peter Garde, which is shown in Figure 4.


Figure 4:

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