A 28-GHz, 4-channel phase adjustable power amplifier IC for 5G front-ends
Introduction
A huge amount of research effort is currently being devoted to developing 5G technology with the aim of roll out by the year 2020. The details of the 5G standard have yet to be defined, but a common vision is that as well as providing much higher data rates this new standard must also allow for extremely low latency (less than one millisecond) and uniform coverage over a wide area. In addition to providing improved performance for existing applications, for example allowing the download of several HD movies in a second, the technology will enable and encourage the development of new markets, technologies and applications.
Although there is still much debate about the precise form that 5G will take, there is a degree of consensus that the standard will frequently require large chunks of contiguous spectrum. This can only be found by utilizing much higher frequencies than those used for current cellular systems operating below 3 GHz. It is therefore envisaged that, as well as making use of current cellular frequencies, a key component of the new 5G radio interface will be the use of mm-wave frequencies where there is greater spectral availability.
Until recently the use of mm-waves for mobile applications has been viewed as a rather inappropriate choice due to their unfavourable propagation characteristics. However a number of research programmes into the implementation of 5G systems have recently reported the results of extensive mm-wave propagation measurements. These were conducted around metropolitan areas in both the United States [1] and South Korea and have shown that the issues can be addressed and overcome. Such research included the investigation of more sophisticated antenna schemes employing phased arrays of antennas to optimise the transmitted and received beams at both the mobile device and the base-station. The fact that wavelengths are small at mm-wave frequencies allows such arrays to be incorporated into a small mobile form factor. It also allows the implementation of compact base-stations which will facilitate regular deployment around metropolitan areas.
Bands in the range 27 to 29.5GHz are strong candidates for the new 5G radio interface and much of the research undertaken to date has been conducted at around 28 GHz [2]. This paper describes the design of a 4-channel transmitter IC with each channel containing a PA with integral 4-bit phase shifter. The IC is designed using a commercially available 0.15µm GaAs pHEMT process and is intended to be housed in a low cost SMT package suitable for volume production.
28 GHz 5G transmit RF front end architecture
The architecture of a typical RF Front-End (RFFE) using the 28 GHz transmit IC is depicted in Figure 1. It shows a 4-element antenna array, with each element being driven by one of the four parallel phase adjustable power amplifiers. It is likely that some degree of filtering would be implemented immediately after each power amplifier for harmonic rejection and suppression of receive band noise and unwanted spurious outputs. A common RF input signal drives each of the 4 channels via an in-phase 4-way splitter at the input of the IC.
Figure 1: Architecture of the 4-channel transmitter IC. Click image to enlarge.
The IC itself is a 4-channel device but if a particular architecture was developed that required a higher number of elements in the antenna array, say 16, then multiple ICs could simply be used in parallel.
Figure 2 shows a layout plot of one channel of the transmitter IC; this is a stand-alone test-chip – the transmitter IC itself comprises 4 separate channels with an in-phase splitter at the input. The test chip measures 3.8-mm x 1.84-mm.
Figure 2: Layout plot of one channel of the transmitter IC. Click image to enlarge.
The PA output (to the right of the layout image) comprises 4 power combined transistors, driven from a pair of power-combined transistors of the same size. The 4-bit phase shifter is positioned before this with an input stage of amplification that is a modified version of the 2 transistor driver stage. Vd1, Vd2 and Vd3 are the drain supplies for the power amplifier and they are nominally set to +6V. Vg1 sets the quiescent bias current in the first stage and Vg23 in the second and third stages.
The phase state of each bit of the integrated phase shifter is controlled by a single-ended TTL compatible control line. All of the control logic required to shift the levels to those needed for the phase shifter bits is included on-chip.
Single channel performance
The performance plots presented below are at room temperature, nominal bias across the frequency range 26 – 30GHz.
The 4-bit phase shifter is based on a switched high-pass/low-pass filter topology [3]; it allows the insertion phase of each channel to be independently set with 22.5° resolution. The most significant bit of the phase shifter (180°) uses two Single Pole Double Throw (SPDT) switches to route the RF signal through either a high pass or a low pass filter. The phase through the high pass filter is advanced compared to the low pass filter with the phase difference being relatively constant over a reasonable bandwidth. Optimisation of the component values is required to obtain the desired phase difference with an acceptable amplitude difference. The lower order bits make use of re-configurable phase shifter bits, in which individual filter components are selectively bypassed with switching elements rather than switching between two different filter networks. This configuration offers the benefit of lower insertion loss.
A plot of the simulated phase shift versus frequency for each of the 16 states of a single channel, including the PA, is shown in Figure 3; the desired flat phase shift versus frequency response is clearly evident.
Figure 3: Phase shift versus frequency for a single channel.
With all digitally controlled phase shifters there is always a (hopefully) small phase difference between the phase shift produced by a certain phase setting and the ideal phase shift that would be produced if each bit were perfect. The RMS phase error is a statistical measure of this deviation, used to quantify the accuracy of the phase setting, and is plotted against frequency in Figure 4 showing a worst case of 2.38°occurring at around 27.5 GHz.
Figure 4: RMS phase shift error versus frequency for a single channel.
The gain of each channel of the transmitter IC is just over 20 dB (excluding the splitting losses of the 4-way in-phase splitter). Gain variation across all 16 phase states is less than ±0.6 dB at 28 GHz. The total gain variation with both frequency (over 26 to 30 GHz) and all phase states is ±1.5 dB.
An ideal phase shifter would have an amplitude response that did not change with phase state. In reality there will always be some change in amplitude associated with a change in phase state. At 28 GHz the RMS amplitude error of each channel of this IC is just 0.2 dB.
As the phase state of a multi-bit, digitally controlled phase shifter changes the reflected waves from each bit experience different phase shifts as they travel back towards the input. Sometimes the reflected waves add constructively at the input, so degrading return loss, sometimes they add destructively, so improving return loss. All multi-bit phase shifters exhibit significant variation in return loss with phase state [3]; the input and output return losses versus frequency for a single channel of this design are plotted in Figure 5 for all phase states. Although significant variation in return loss with phase state is evident, the worst case return loss is still good. The worst case return loss across the 26 to 30 GHz range occurs at 26 GHz for both input and output. At the input the worst case return loss is 13.4 dB and at the output it is slightly higher at 14.9 dB.
Figure 5: Input and output match versus frequency for a single channel, all phase states.
The quiescent bias current of the complete 3-stage PA is 626mA from +6V. Each PA can provide an RF output power at 1 dB gain compression (P-1dB) of 30 dBm at 28 GHz. Across the 26 to 30 GHz band the P-1dB is nominally +29.5 dBm with a variation of <±1 dB.
The corresponding Power Added Efficiency (PAE) for one PA channel operating at 1 dB gain compression is 24% at 28 GHz, whilst across the full 26 to 30 GHz simulated range it is nominally 21.5% with a variation of ±3% across the band. 5G systems will operate with modulation schemes that have high peak to average power levels. It is therefore likely that the PA will be operated at an average output power level that is backed off from P1dB to preserve modulation fidelity.
The traditional linearity metric for microwave amplifiers is the output referred third order intercept point (OIP3). With the total average input power set to 0 dBm i.e., the power in each input tone is set to -3 dBm, the nominal power in each output tone is around +17 dBm. The simulated OIP3 for each channel in this case is +38.8 dBm ±0.7 dB across the band.
Table 1 presents a summary of the simulated performance of each channel of the phase adjustable PA.
Table 1: Performance summary of each channel of the 4-channel phase adjustable PA.
Simulations of a four channel array
Simulations were undertaken to show the antenna pattern that could be produced by a linear array of 4 omnidirectional (0 dB gain) antennas spaced by a half wavelength (λ/2) at 28 GHz when driven by the 4-channels of the phase adjustable PA MMIC. With all channels set to the reference (0°) phase state, the maximum gain is on bore-sight. The absolute gain of the 4 element array of 0 dB gain elements would be 6 dB (10.Log10(N), where N is the number of elements). In practise the individual elements would have some level of gain and the bore-sight gain of the array would be augmented by this.
By adjusting the insertion phase of the channels it is possible to electrically steer the antenna beam. The polar plot of Figure 6 shows the simulated antenna pattern when the beam is steered to -38.68°. This is achieved by applying an incremental phase shift of -112.5° across the elements of the array. The amplitude response of the plot is normalised in dB and the azimuth angle is in degrees. The ability to electronically steer the antenna beam is one of the benefits of using a phased array approach. The plot includes the effects of the systematic gain and phase errors in each channel.
Figure 6: Beam pattern produced with phase states of the 4 channels set to steer the beam to -38°.
Conclusion
This article has described the design of a 4-channel 28 GHz (27 to 29.5 GHz), transmitter IC. Each channel of the IC includes a power amplifier with an integral, independently controllable 4-bit digital phase shifter. The IC is intended for use in the transmit chain of an RF Front-End (RFFE) module in either a 5G mobile device or base-station. It has been designed using a commercially available 0.15µm GaAs pHEMT process and is suitable for assembly in to a single SMT package.
Details of the layout of a test chip for evaluating the performance of a single channel were presented along with simulations of key performance parameters including RMS phase error, RMS amplitude error and OIP3. Antenna pattern simulations for the four channels of the IC driving a four element linear array were also produced to show its potential for beam steering.
It should be noted that although this article has focused on a four element array, the solution can be extended to arrays containing a larger number of antenna elements. For example if the desired number of elements in the antenna array was 16 then this would require four of the 4-channel phase adjustable power amplifiers operated in parallel.
References
- Theodore S. Rappaport, NYU Wireless, “Millimeter Wave Mobile Communications for 5G Cellular: It Will Work!”, IEEE Access 30th May 2013
- Wonbin Hong, Samsung Electronics, “Design and Analysis of a Low-Profile 28 GHz Beam Steering Antenna Solution for Future 5G Cellular Applications”, IEEE MTT-S International, June 2014
- Liam Devlin, “The Design of Integrated Switches and Phase Shifters”, Proceedings of the IEE Tutorial Colloquium on “Design of RFICs and MMICs”, Wednesday 24th November 1999, pp 2/1-14
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