Researcher builds supercomputer with Raspberry Pi boards

November 14, 2017 // By Nick Flaherty
The BitScope Pi Cluster Modules system provides a testbed for high-performance-computing system-software developers. The system comprises five rack-mounted BitScope Pi Cluster Modules consisting of 3,000 cores using Raspberry Pi ARM processor boards, fully integrated with network switching infrastructure.
A researcher at the Los Alamos National Laboratory in the US has developed an affordable, scalable supercomputer system using thousands of inexpensive Raspberry Pi nodes.

The system brings a powerful high-performance-computing testbed to system-software developers and researchers while reducing the cost and power consumption compared to other HPC systems by using boards from the Raspberry Pi Foundation in Cambridge.

"It's not like you can keep a petascale machine around for R&D work in scalable systems software," said Gary Grider, leader of the High Performance Computing Division at Los Alamos National Laboratory, which hosts the Trinity supercomputer. "The Raspberry Pi modules let developers figure out how to write this software and get it to work reliably without having a dedicated testbed of the same size, which would cost a quarter billion dollars and use 25 megawatts of electricity."

He system consists of five rack-mounted Pi Cluster Modules, each with 150 four-core nodes of Raspberry Pi ARM processor boards. They are fully integrated with network switching infrastructure. With a total of 750 CPUs with 3,000 cores, the system gives developers exclusive time on an inexpensive but highly parallelized platform for test and validation of scalable systems software technologies. The whole system uses 2.2kW of power.

"Having worked with Raspberry Pi for quite some time, I've long thought it the ideal candidate to build low-cost cloud and cluster computing solutions for research and education," said Bruce Tulloch, CEO of BitScope in Australia which developed the racks. The Pi Cluster Modules can also be used for better simulation of large-scale sensor networks, with flexible I/O to connect the actual sensor devices as well as HPC network topology research, to improve production performance, as well as applications that scale across the internet of things (IoT).

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