How silicon carbide helps to get the best from a solar PV system
With all the emphasis on inverter efficiency, why is the physical limit to solar panel conversion efficiency (solar insolation to electrical power) is around 30% with current technology? At the moment, the maximum reached in a lab is about 26.5% and production panel efficiency typically ranges from 17 to 21%, with potential improvements centered around careful mechanical design to minimize ‘cell shading’ and to collect every possible photon available. Why not make the inverter cheaper, although somewhat less efficient?
Power loss creates heat that must be dealt with. Consider a 1 % improvement in efficiency of a 500 kVA inverter system. This is tantamount to turning off five 1 kW space heaters inside the already heat-soaked cabinet and power electronics is all about heat. The problem is it is low-quality heat, not easily recaptured for cogeneration of energy. Reducing heat reduces heat sink cost while simultaneously improving reliability. Increasing efficiency however adds cost regarding the number and type of power semiconductors, and there is definitely a point of diminishing returns.
The reality is that some of the efficiency gains from SiC devices are “spent” on increasing the switching frequency, which reduces the size and cost of magnetics and capacitors, thus offsetting the higher cost of SiC with system-level cost savings. The good news is that the switching frequency can increased substantially over that of IGBTs, certainly above the audible range, with only a tiny increase in total power loss.
A Typical Inverter Topology
A common topology for a solar inverter feeding into a three-phase 400 VAC mains system (typical European installation) uses IGBTs in a ‘Transistor Neutral Point Clamped’ (TNPC) arrangement (Figure 1). This runs off a DC link of 600 to 800 VDC, boosted as needed from the solar panel voltage, and achieves better than 98% peak efficiency when switching in the audible range (15 kHz or less). Including the booster, there are 13 switch positions with IGBTs, six rated at 600V and seven at 1200V. Each IGBT needs a parallel fast diode (arguably except the booster). With low frequency operation the inductors are large and heavy to avoid magnetic saturation. Increasing the operating frequency would reduce their size approximately in proportion but the IGBT switching losses would quickly become unbearable.
Figure 1. Typical solar inverter arrangement
To reduce complexity, the IGBTs Q1-6 could be omitted but the volt-seconds in the output inductors L2, 3, 4 would double, substantially increasing their physical size again.
Impact of SiC on Topology Selection
Silicon Carbide (SiC) switches are an obvious choice to replace the IGBTs in new designs. They have lower switching and static losses and certainly work well at much higher frequencies, reducing passive components size. A simple solution would be SiC cascode devices in a two-level inverter (Figure 2). These hybrids of SiC JFETs and traditional Si MOSFETs have flexible gate drive and a fast intrinsic diode with low forward drop. Switching frequency can be pushed up to 50 kHz or more such that the volt-seconds in the magnetics are low and the clamp transistor can be omitted, leaving the circuit as a standard full bridge.
The switching loss in the full bridge doubles, but clamp transistor losses are eliminated, creating a dependency between total power losses and switching frequency. The crossover in switching frequency of TNPC versus two-level topologies is relatively high however for SiC devices, near 100 kHz, with the TNPC topology’s efficiency being much less sensitive to switching frequency. Compared with the IGBT solution, this is six less switches and 13 diodes. Magnetics can be specified to give an optimum power and cost saving across resistive and core losses, traded against size.
Figure 2. SiC cascode solution
The problem regarding transformer-less inverter solar systems with ungrounded panels ( which are very common) is that the two-level topology sends high frequency, high voltage common-mode noise along the DC link and consequently all over the solar panel array. Solutions to this problem include adding a fourth inverter leg, which adds hardware without improving efficiency, adding a line-frequency isolation transformer, which adds unacceptable weight and cost, using an isolated boost converter, or going back with a three-level inverter. The lowest cost solution comes back to the common topology of Figure 1, with the IGBTs and anti-parallel diodes replaced by cascodes, with the TNPC inverter commutated in a way that cancels the common-mode voltage swings.
Tradeoff
The three-level inverter topology cuts switching loss in half (because half the voltage is switched), which benefits SiC devices less than lossy IGBTs, but is still a benefit. The main advantage with SiC devices is the ability to squash common-mode noise. The lower losses from SiC purchase greatly reduced size and weight, with equal or reduced system-level cost. This “expenditure” is very slight because at IGBT switching frequencies, the switching loss of SiC devices is a very small portion of total semiconductor losses. The switching frequency can often be doubled without significantly affecting overall efficiency. The impact on passive components and heat sinking is substantial however, greatly shrinking overall size, weight, and installation cost.
Jonathan Dodge is Senior Applications Engineer at UnitedSiC
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