Exar: Solving the Power-Up Challenge for SmartFusion2 SoC FPGAs

March 13, 2017 // By Debbie Brandenburg and Simo Radovic
FPGAs, such as those in the SmartFusion2 SoC FPGA family, allow end-system designers to better react to last-minute product definition changes and reduce development times. FPGAs require multiple dedicated rails to supply core, I/O, memory, and other precision voltages and so need carefully designed power management solutions. Improper start-up/shut-down sequencing, uncontrolled rise times or non-monotonic ramp- up of sensitive multi-rail systems can cause reliability issues and system faults. This paper will discuss a power management solution that provides control of these parameters, is compact, flexible and easy to implement.
Power, FPGA,

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